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Teradyne and Cadence Address Improved Test and Diagnostic Flow for Nanometer Devices



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Joint project with Cadence assures first-time correct test programs and efficient diagnostics flow enabling higher yielding devices for today's most challenging nanometer designs

BOSTON—(BUSINESS WIRE)—Dec. 12, 2005— Teradyne, Inc. (NYSE:TER) a leading supplier of Automatic Test Equipment, today announced a validated flow for test and yield diagnostic information between the Teradyne(R) FLEX(TM) Platform and Cadence(R) Encounter(TM) Test from Cadence Design Systems Inc. The Teradyne family of test systems running the IG-XL(TM) software system now supports Encounter True-Time Delay Test patterns in industry standard STIL or WGL format and Encounter Diagnostics CPP format. The validation of this flow assures joint customers of an optimal and efficient experience as they seek to increase product quality and improve device yields.

Improved Delay Tests Improve Product Quality

Efficient testing of nanometer devices requires proven links between Automatic Test Equipment (ATE) and Automatic Test Program Generation (ATPG). A validated flow assures test programs will function correctly the first time and be able to detect subtle delay defects common in today's nanometer devices. The Cadence Encounter True-Time Delay Test ATPG solution is unique in that it creates test patterns that can run faster than at-speed on ATE, enabling more productive test coverage than traditional delay testing which can miss a significant number of delay defects. In addition, True-Time Delay Test is unique in the industry as it constrains pattern generation to the timing capabilities of the tester, assuring its patterns will run the first time in production. Finally, to assure the highest possible quality, Encounter True-Time Delay Test uses actual post-layout design timing information to assure it can detect the smallest defects, such as resistive opens and shorts.

"It is essential to have a good match between ATPG and ATE capabilities especially to detect critical delay defects so common in designs at 90nm," said Hap Walker, System Architect, Teradyne. "This is why we worked with Cadence to assure a working flow with our FLEX architecture. When used in conjunction with Encounter True-Time Delay Test, our mutual customers can easily leverage the best attributes of both products resulting in higher product quality and lower test costs."

Validating the Diagnostics Flow

Teradyne and Cadence also validated a path from Teradyne ATE to Encounter Diagnostics, assuring customers of rapid resolution of ATE failures which is essential in any yield enhancement flow.

"At 90nm it is essential to identify and quickly resolve systemic defects which have traditionally been difficult to isolate within silicon," stated Sanjiv Taneja, general manager, Encounter Test at Cadence. "To enable better yield enhancement efforts, a tight link is required between ATE and the diagnostic engine so large volumes of ATE failure data can be easily analyzed during high-volume testing."

Encounter Diagnostics accelerates nanometer yield ramp in high-volume manufacturing environments. In volume mode, the tool identifies critical yield limiters based on analysis of test failures from ATE. Efficiency dictates compatibility between ATE and the diagnostics solution so that ATE fail data can be quickly analyzed and acted upon. Teradyne validated its failure logs to assure their compatibly with Encounter Diagnostics' Chip Pad Pattern (CPP) format.

About FLEX

The Teradyne FLEX Test Platform advances multiple technologies in a test architecture designed for high-efficiency, multi-site test. The Platform offers multiple systems so customers can optimize for performance, capacity and capital cost to achieve lower cost-of-test. FLEX Platform systems span test requirements from DFT and structural test to standard analog and mixed-signal to the latest high-integration System-on-a-Chip (SOC) and System-In-Package (SIP) devices for consumer, automotive, mass storage, wireless, and data communications applications. The FLEX Platform architecture delivers instrument synchronization and control in device clock time on a vector-by-vector basis, even in multiple time domains. A Universal Slot test head design allows easy reconfiguration for changing test needs. The IG-XL(TM) software operating system provides fast program development, including instant conversion from single to multi-site test. And, the OpenFLEX(TM) open system architecture complements the FLEX Platform's broad set of high-density instrumentation, allowing focused instruments to be added and further enhance system performance and test economics. To learn more about the FLEX Platform, visit http://www.teradyne.com/flex/.

About Teradyne

Teradyne (NYSE:TER) is a leading supplier of Automatic Test Equipment. The company's products deliver competitive advantage to the world's leading electronics companies. In 2004, Teradyne had sales of $1.8 billion, and currently employs about 4,100 people worldwide. For more information, visit www.teradyne.com. Teradyne(R) is a registered trademark of Teradyne, Inc. in the US and other countries. All product names are trademarks of Teradyne, Inc. (including its subsidiaries) or their respective owners.



Contact:
Teradyne, Inc.
Karen Kilcoyne, 508-833-2354
Email Contact



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